Wednesday, 23 August 2017

Easy way to claim free 50 WCX Coins before ICO

You get free 50 WCX Coins instantly

claim 50 WCX Coins for free with yahoo or gmail, before ICO at 10 October 2017


Easy way to claim free 50 WCX Coins before ICO
    ICO at 10 October 2017

WCEX is a brand new digital currency exchange and they are going to launch soon. As part of launch they are offering free 50 WCX coins. Use below link to create your account and claim free coins.
Go to your email, click on the confirmation link, then you will get your free 50 WCX Coins.
(you need yahoo mail or gmail.com to click on confirmation email)

You get free 50 WCX Coins instantly,
bonus plus: Invite Friends & Earn more WCX Tokens
after that you can tell your friends to get a plus bonus :
When a friend signs up using your unique link, you get another  50 WCX Coins,
then 5% of the WCXT they buy, and they get an extra 15% bonus when they buy WCXT.

http://bit.ly/2x5rF8G


http://bit.ly/2x5rF8G

As a holder of WCX Tokens, you're entitled to a portion of WCX's revenue.

20% of all revenue generated by WCX is automatically paid out to token holders, in amounts based on each holder's share of the total amount of tokens.

As an exchange, WCX collects fees in many digital currencies. That means that holding WCXT is equivalent to holding a passive income portfolio of diverse digital currencies.

=============================================================

Why choose WCX ?

below here are the words from WCX team


Our long-term strategy is simple. We put clients first.

Tiny Fees.
Some exchanges charge up to 1% in fees on every transaction. WCX is 10x cheaper and market makers are paid. That means more money stays in your pocket.

Secure.  
98% of customer funds are kept in cold storage at all times. Server infrastructure is segregated and protected with the latest security software.

Built For Scale.
Our trading engine was built by Wall Street veterans and field tested for three years, relaying over one million transactions per second without hiccups.

Radically Better User Experience.
A unified and powerful trading dashboard means WCX feels fast, fluid, and intuitive on both desktop and mobile.

Awesome Customer Support.
Our scalable customer support team is ready to answer your questions whenever you need to ask them, even in times of high traffic.

Global & Anonymous.
Start trading wherever you are in the world - no ID verification required. WCX operates entirely with digital currency and does not deal with banks.

Advanced Order Types.
Easily submit market, limit, stop, trailing stop, and block orders that work exactly as you expect - with unmatched execution speed.

High-Performance API.
Trade programmatically by connecting directly to WCX through REST, WebSocket, or FIX for high frequency traders.

Team.
Our team comes from Apple, Deutsche Bank, and IBM, and has decades of experience in building secure, distributed, and massive-volume systems.


Roadmap

Beta Launch. 9.1.17
ICO. 10.1.17
Launch. 10.10.17
Mobile Apps. Jan 2018
Margin Trading. Mar 2018
Fiat Integration. Q2 2018
Wallet Decentralization. Q3 2018

We monitor the source of your referrals. Advertising software, ad viewing sites, automation, scripting, Twitter blasts, use of disposable emails, unethical marketing schemes, and other spam referral methods will result in account termination without notice.

=============================================================

Global Low-Cost
Digital Currency Exchange

Stop putting up with lousy exchanges.
WCX offers a pro experience with 10x lower fees.

http://bit.ly/2x5rF8G

10 WCX = 1 USD at ICO
ICO begins Oct 1, 2017

you can also Buy WCXT (Presale)

Bitcoin Fork - Bitcoin Cash a Dangerous Trick


The 1st of August 2017, 2:14 p.m. ET will forever be remembered as the day when bitcoin hardforked into two separate chains as of block number 478559.

ViaBTC mined the first bitcoin cash 1MB block making it official. BCH is currently trending at ¥2,700 which is approximately $400.00. The original bitcoin (BTC) is going strong at $2,762.

So, it's happened.
We have two bitcoins: Legacy bitcoin (BTC) and bitcoin cash (BCH or BCC). For uniformity, let's abbreviate the latter with BCH.



The newly created Bitcoin Cash (BCH) is a rushed spinoff of Bitcoin (BTC), a clonecoin of which there have been many in Bitcoin's past. Because the name is confusing, many have taken to calling it “Bcash” to avoid buyer confusion.

There have been myriad clonecoins of various types since Bitcoin's inception. Bitcoin Cash is a style of clone that copies Bitcoin's codebase along with its blockchain up until a certain point. Normally when new alternative cryptocurrencies are created, developers just clone the code and not the blockchain. But Bitcoin Cash copied Bitcoin's blockchain as well, which created a situation in which everyone that had one bitcoin suddenly also had one bitcoin cash.

The creation of Bitcoin Cash was an orchestrated scheme, rushed to the point of engendering significant safety risks. Digital currencies just don't spontaneously appear out of nowhere. The Bitcoin Cash fork was created by a developer that wanted to increase block sizes, with the hypothetical result being more transactions being processed on the blockchain.
Bitcoin

This might sound like a good idea, but clonecoins can be incredibly disruptive to risk management and operational demands on digital currency infrastructure companies. The cost to launch a clonecoin is minimal, but the overhead for the ecosystem to actually support it is high. As Bitcoin Cash duplicated Bitcoin, at the time of the fork every bitcoin holder now had coins on another blockchain, and therefore skin in the game. This was a type of psychological experiment to see if people as a group could be tricked into ascribing value to something created from nothing, if they were given it as a gift. This experiment seemed to work, and it put a great deal of pressure on exchanges and wallet providers to support Bitcoin Cash, whereas a new altcoin would largely just be ignored.

Some exchanges such as Coinbase simply said they would not support Bitcoin Cash and urged their users to who felt otherwise to withdraw their coins prior to August 1, when the cryptocurrency forked. I can identify with these exchanges. Having run an exchange myself, I can tell you that supporting a new coin isn't something you rush into. Customer support teams need to be aware of the complexities and nuances so they can explain them to customers. Systems for processing deposits and withdrawals must be updated. Additional servers need to be spun up and integrated with existing systems. Security auditing and quality assurance testing must run their course. Compliance guidelines and terms of service need to be updated and reviewed by legal teams.

====================================================================================

Below here is from Samson Mow the chief strategy officer at Blockstream.

We have always taken a security-first approach to technology here at Blockstream, and commend exchanges for doing likewise. Exchanges are the operational end of Bitcoin infrastructure, with billions of dollars under technical management. In Bitcoin Cash, keys controlling ownership of coins are shared with real Bitcoin investments totaling $50 billion. Sharing those Bitcoin keys with untested software in order to claim a Bitcoin Cash gift is highly risky—maybe too risky.

The Bitcoin Cash chain may survive, but its value will likely dip below $100. It's currently trading anywhere from $200 to $300 on various exchanges, but this price is artificially inflated due to many exchanges refusing to accept deposits, as well as the Bitcoin Cash blockchain not functioning properly. Bitcoin's blockchain processes a block of transactions roughly every 10 minutes, but Bitcoin Cash average block times are an hour (sometimes with no blocks for 13 hours). This means that users are having issues with even sending their bitcoin cash to exchanges to sell off.

We can already see a correlation between when Bitcoin Cash transactions are processed and when massive selloffs take place on exchanges. Compound that with the fact that 76% of all bitcoin cash that will ever exist is already mined and waiting to be sold, that there is absolutely no Bitcoin Cash integration or support in the real world, that its codebase is being maintained by a single developer, the long-term prospects of the new cryptocurrency are unclear.

====================================================================================

Whatever happens though, Bitcoin Cash's birth has shown that markets can be manipulated with just a bit of computing power, a participating exchange, and a healthy dose of greed. If you're running a digital currency exchange or wallet, beware the attack of the clonecoins.

Saturday, 19 August 2017

King for husband and wife is Queen, For good laugh or For good cry


Golden Words By A Wise Man, about husband and wife
  1. If you want to change the world, do it when you are a BACHELOR MAN.
    After marriage, you can't even change a TV channel
  1. Listening to wife is like reading the terms and conditions of website.
    YOU UNDERSTAND NOTHING, STILL YOU AGREED
  1. Chess is the only game in the world, which reflects the status of the husband.
    The poor King can take only one step at a time...
    While the Mighty Queen can do whatever she likes.
  1. All men are brave. Horror movies don't scare them...
    But 5 missed calls from wife...surely dead...
Send this to all men, see who can smile after reading this...
and to all ladies who can LOL after reading it
LOL laugh out loud
For good laugh or For good cry

about husband and wife.jpg


Send this to all men, see who can smile after reading this ...

 ___________________________________________



My Paypal Account is :   ksw.industries@gmail.com
buy me  a cup of coffee
Send me any small amount of money is welcome.

Tuesday, 15 August 2017

Ethereum hack using a multi-signature and a force-major split of coins

all below here are from Ethtrade


==================================================================
For the past year and a half, Ethtrade and members have accomplished a huge amount of work. Most of the work has been mainly positive and not in vain. Unfortunately, it doesn't matter how things were because the Ethtrade management team has come to a clear, unanimous conclusion about the future stable development of the company and it's community which depends on only ourselves.
The past month of July, Ethrade Global was forcefully made to go through many, only previously imaginable, major changes. The main highlights of major issues are:

Ethereum hack using a multi-signature and a force-major split of coins,
a huge dump with many promising ICO Coindash and Veritaseum all because of hack attacks.
Closing of BTC-e exchanger with huge amount of Companies assets, where over the last months, all main trades have been taking place.



https://www.cryptocoinsnews.com/classic-ether-wallet-falls-victim-to-a-social-engineering-hacker/
https://news.bitcoin.com/ethereums-parity-client-users-lose-millions-multi-sig-hack/
http://fortune.com/2017/07/05/bitcoin-ethereum-bithumb-hack
https://www.coindesk.com/7-million-ico-hack-results-coindash-refund-offer/
http://www.ibtimes.co.uk/veritaseum-hack-8-4m-worth-ethereum-stolen-by-hackers-yet-another-heist-1631745
That was only July

Ethtrade predicted the need for change so it partnered with a new crypto partner & found a solution. In order for us to be successful, the company will have to break away from the old business model with traders (as we all can see that Ethtrade depends directly on such negative things that have taken place) and come to a absolutely new stage of development.
So we as predicted we already have started making agreement beforehand with the new crypto partner, but for that Company will have to refuse from the old business model (as we all can see that Ethtrade depends directly on such negative things which taking place) and come to an absolutely new stage of development. The company will manage to switch from the old business model to the new one securing a more dynamic, controlled, and predictable future for all of us because we will be depending on ourselves.

We have practically proven that, yes, development using trading strategies on side platforms, and exchanges can be extremely profitable. We also have managed how rapidly everything changes, and as it continues to go the same direction it would be too high of a risk and more obvious failure if we do not make serious changes as proven by recent incidents mentioned above.

We all remember the risks with wallets security and assets safe keeping on them, huge risks participating in aside ICO, partners security measures, and many many other factors, negatively affecting the stability of the entire system.

We did not stored all your funds in our wallets, we forwarded them direct to stock exchanges and iCO, but on the basis of recent bad news, we will refuse even to forward them because I we obvious risks, even that everyone was warned and theoretically prepared for them.
All these things have given a clear signal, that any further development without fundamental changes in business model is no longer possible.

So what does this mean? Ethtrade platform has found a crypto partner, congratulating you all genially, declaring transition stage from Ethtrade to crypto partner «Bullcoin».

What does this partnership give you?
First of all it gives you safety your coins.
Secondly, Opportunity to trade using skills and strategies without any limits and restrictions, in all countries (except USA), where an internet only exists.
Most importantly, it gives you up to 12% of monthly increase when mining using the POS system, only under one condition, that all your coins are being kept on your PC, and every time you keep it your crypto client turned at your PC.

Due to all major - force stories Ethtrade has went through during last month July, you all be having your assets recalculated from Ethtrade into BLC, with next way: portfolios minus 60% (we hope everybody understood situation according to the article 10 Force-majeur of the User agreement of the web site & do our best to find the solution.

Thank’s to BLC we have a great chance to join in the first row (only Ethtrade users will get coins now) and convert funds to BLC, which were lost on exchangers and ICOs, under condition, that new crypto currency will leave open, mined on your daily turned BLC clients at your PCs.

Software client already works in high-grade mode and available on some exchanges.
Currently, the purchase of Cryptobullcoin is available to only Ethtrade users. In foreseeable future, all others will be able to buy, so don't rush to sell BLC - the planned growth rate can be 100-200% within a year (provided organic development and mining).

Also, with development and expansion of new coin, you will be able to control the rate of coin on your own. The higher demand is, the higher price.
All these opens doors at a furious rate, with even more incredible possibilities in future.

Our will, and dedication to this new business model plus your urge towards success, can significantly improve the current way of business, and improve the quality of provided services. These are education, practical lessons, and physical tangible results.

It is important to add, that from now on, all users, except only citizens of USA, will be able to continue to work using Bullcoin client.
Here are some facts about Bullcoin:
Bullcoin is not a security, an equity or a bond. Bullcoin didn't and doesn't plan to do ICO Bullcoin doesn't require additional capital, it is created to exchange among users and for speculative trades and exchanges. Users of client control the system by them selves Configuration:
To start BLC mining, you must meet a number of conditions:
- download the wallet app for Windows, Mac OS, Linux on the following web site www.bullcoin.io
- install the Cryptobullcoin wallet app following the installation instructions;
- run this app and wait for the full synchronization of the BLC blockchain (after the synchronization is completed, a green check mark should appear in the lower right corner);
- always make a backup of your wallet (File>Backup wallet).

Receiving of coins:
To do this, press "Receive coins" button in Cryptobullcoin app, then click "New address" - your BLC address will looks like "BDs5znQjXLT2GE8HGhhDsZmqFJ2NP5umfz".

This address should be inserted in the in your account on the website before August 5.
Storage:
In addition to storing in wallets for Windows, Mac OS and Linux, it's also possible to store BLC on an Android wallet. In this case, there is no need to download blockchain to your phone, since it's a Lite client. Be sure to save the backup phrase when creating a wallet - this phrase is the main key to your Android wallet.
Attention! Storing BLC in your Android wallet & any stocks & exchanges eliminates the possibility of POS mining.
The BLC network generates 12% of new coins a month, they are obtained by miners with each new block.
The confirmation time of each block is about 2 minutes.
Each miner has a chance to get a new block and get a reward for it, his chances depend on the number of coins on his mining balance and the total volume of coins in the BLC network.

The state of the network can be observed online at www.explorer.bullcoin.io

Now you can trade and manage the whole process by own.
Store your coins online using the client and earn on mining without additional risk factors.
If you have any questions, you can support contact for advice.
We strongly believe this business model performs it self as more safe & stable one.

==================================================================
==================================================================

Until now 2017-8-16 , there are a lot person that have not yet receive BullCoin.
They say still in process..

So, be very careful when investing!

Safe and logic.

Friday, 4 August 2017

BitCoin BTC and BitCoin Cash BCH, Different action from CoinBase and LocalBitcoins

We have two kinds of bitcoins now : Legacy bitcoin (BTC) and bitcoin cash (BCH or BCC). For uniformity, let’s abbreviate the latter with BCH.

The 1st of August 2017, 2:14 p.m. ET   , will forever be remembered as the day when bitcoin hardforked into two separate chains as of block number 478559.

ViaBTC mined the first bitcoin cash 1MB block making it official. BCH is currently trending at ¥2,700 which is approximately $400.00. The original bitcoin (BTC) is going strong at $2,762.


 
_____________[ this is from LocalBitcoins ] ____________

oksana.localbitcoins
On August 1st a new Cryptocurrency was created called Bitcoin Cash. Anyone who controlled Bitcoin on August 1st at 12:20 PM UTC now also controls a corresponding amount of BCH with the same private key.

LocalBitcoins has always run the Bitcoin core software and this software only supports Bitcoin. As in the previous times when new cryptocurrencies have been launched that have either promised tokens to Bitcoin holders or outright copied the Bitcoin Blockchain (Clams, Lumens), LocalBitcoins has not offered support for the currency or allowed withdrawals of it.

LocalBitcoins main priority is to keep Bitcoins deposited by customers safe. Adding support for new Cryptocurrencies that share private keys with Bitcoin would expose customer funds held by us to great risks, risks that we believe are larger than the benefits these cryptocurrencies provide.

While we are not opposed to adding other cryptocurrencies to our platform, at this point in time we do not have any plans to support any cryptocurrencies other than Bitcoin.
_____________[ above  is from LocalBitcoins ] ____________




at Coinbase , both bitcoin and bitcoin cash remain safely stored on Coinbase.
Customers with balances of bitcoin at the time of the fork now have an equal quantity of bitcoin cash stored by Coinbase.

  _________________________________________

Long story short …

- LocalBitCoin offer no support for Bitcoin Cash

- If you had Bitcoin (BTC) on LocalBitCoin when the new alt BCH (Bitcoin cash) was created you will not get any BCH.

- That's it.

BUT,
I hope localbitcoin.com will come around do the same way like  CoinBase.

Sunday, 30 July 2017

Assembly Language : 8086 Assembler Tutorial Part 12

Assembly Language programming : 8086 Assembler Tutorial (Part 12)

Controlling External Devices


There are 3 devices attached to the emulator: Traffic Lights, Stepper-Motor and Robot. You can view devices using "Virtual Devices" menu of the emulator.

For technical information see I/O ports section of Emu8086 reference.

In general, it is possible to use any x86 family CPU to control all kind of devices, the difference maybe in base I/O port number, this can be altered using some tricky electronic equipment. Usually the ".bin" file is written into the Read Only Memory (ROM) chip, the system reads program from that chip, loads it in RAM module and runs the program. This principle is used for many modern devices such as micro-wave ovens and etc...




Traffic Lights



Usually to control the traffic lights an array (table) of values is used. In certain periods of time the value is read from the array and sent to a port. For example:


; directive to create BIN file:
#MAKE_BIN#
#CS=500#
#DS=500#
#SS=500#
#SP=FFFF#
#IP=0#

; skip the data table:
JMP start

table DW 100001100001b
      DW 110011110011b
      DW 001100001100b
      DW 011110011110b

start:

MOV SI, 0

; set loop counter to number
; of elements in table:
MOV CX, 4

next_value:

; get value from table:
MOV AX, table[SI]

; set value to I/O port
; of traffic lights:
OUT 4, AX

; next word:
ADD SI, 2

CALL PAUSE

LOOP next_value

; start from over from
; the first value
JMP start

; ==========================
PAUSE PROC
; store registers:
PUSH CX
PUSH DX
PUSH AX

; set interval (1 million
; microseconds - 1 second):
MOV     CX, 0Fh
MOV     DX, 4240h
MOV     AH, 86h
INT     15h

; restore registers:
POP AX
POP DX
POP CX
RET
PAUSE ENDP
; ==========================





Stepper-Motor



The motor can be half stepped by turning on pair of magnets, followed by a single and so on.

The motor can be full stepped by turning on pair of magnets, followed by another pair of magnets and in the end followed by a single magnet and so on. The best way to make full step is to make two half steps.

Half step is equal to 11.25 degrees.
Full step is equal to 22.5 degrees.

The motor can be turned both clock-wise and counter-clock-wise.

See stepper_motor.asm in Samples folder.

See also I/O ports section of Emu8086 reference.






Robot



Complete list of robot instruction set is given in I/O ports section of Emu8086 reference.

To control the robot a complex algorithm should be used to achieve maximum efficiency. The simplest, yet very inefficient, is random moving algorithm, see robot.asm in Samples folder.

It is also possible to use a data table (just like for Traffic Lights), this can be good if robot always works in the same surroundings.







  emu8086 is better than NASM, MASM or TASM

Tag: 8086 Assembler, 8086 microprocessors instruction, assembly code, Assembly coding, assembly guide, assembly instruction, assembly language, assembly language instruction set, assembly language programming, Assembly program, assembly programming, capital letter, character convert, complete 8086 instruction sets microprocessors, complete instruction timing and instruction sets for 8086 microprocessors, conversion of characters in assembly language programming 8086, convert, emu8086, instruction complete set, instruction set complete for 8086, instruction sets, instruction sets for 8086, Lower case, Lowercase, print the small character into capital letter, programming 8086 assembly language conversion of small characters to capital, small letter, text string convert, Tutorial,

Assembly Language : 8086 Assembler Tutorial Part 12

Assembly Language : 8086 Assembler Tutorial Part 11

Assembly Language : 8086 Assembler Tutorial Part 10

Assembly Language : 8086 Assembler Tutorial Part 9

Assembly Language : 8086 Assembler Tutorial Part 8

Assembly Language : 8086 Assembler Tutorial Part 7

Assembly Language : 8086 Assembler Tutorial Part 6

Assembly Language : 8086 Assembler Tutorial Part 5

Assembly Language : 8086 Assembler Tutorial Part 4

Assembly Language : 8086 Assembler Tutorial Part 3

Assembly Language : 8086 Assembler Tutorial Part 2

Assembly Language : 8086 Assembler Tutorial Part 1

Assembly Language Programming : Complete 8086 instruction sets

Assembly Language Programming : I/O ports - IN/OUT instructions 

Assembly Language programming : Emu8086 Assembler Compiling and MASM / TASM compatibility

Assembly Language - string convert - Lowercase , Uppercase

for programming : the language of Number

Assembly Language - Complete Instruction Set and Instruction Timing of 8086 microprocessors

Assembly Language programming : A list of emulator supported interrupts

Assembly Language Programming : Emu8086 Overview, Using Emulator, Virtual Drives

Assembly Language Programming : All about Memory - Global Memory Table and Custom Memory Map

buy me  a cup of coffee

My Paypal Account is :  ksw.industries@gmail.com

Send me any small amount of money is welcome.
buy me  a cup of coffee

 ___________________________________________


Need More Detail ?   contact me !!


My Paypal Account is :   ksw.industries@gmail.com
buy me  a cup of coffee
Send me any small amount of money is welcome.

___________________________________________


Don't know how to send money ?   Click here for detail about Paypal account.
About PayPal Payment Methods

What type of PayPal accounts is better.
 


Don't have money? OK! Here is another way to get the program.
how to get my program - Free of charge




Friday, 28 July 2017

Assembly Language Programming : Complete 8086 instruction set

Assembly Language Programming : Complete 8086 instruction set


Quick reference:

AAA
AAD
AAM
AAS
ADC
ADD
AND
CALL
CBW
CLC
CLD
CLI
CMC
CMP
CMPSB
CMPSW
CWD
DAA
DAS
DEC
DIV
HLT
IDIV
IMUL
IN
INC
INT
INTO
IRET
JA
JAE
JB
JBE
JC
JCXZ
JE
JG
JGE
JL
JLE
JMP
JNA
JNAE
JNB
JNBE
JNC
JNE
JNG
JNGE
JNL
JNLE
JNO
JNP
JNS
JNZ
JO
JP
JPE
JPO
JS
JZ
LAHF
LDS
LEA
LES
LODSB
LODSW
LOOP
LOOPE
LOOPNE
LOOPNZ
LOOPZ
MOV
MOVSB
MOVSW
MUL
NEG
NOP
NOT
OR
OUT
POP
POPA
POPF
PUSH
PUSHA
PUSHF
RCL
RCR
REP
REPE
REPNE
REPNZ
REPZ
RET
RETF
ROL
ROR
SAHF
SAL
SAR
SBB
SCASB
SCASW
SHL
SHR
STC
STD
STI
STOSB
STOSW
SUB
TEST
XCHG
XLATB
XOR



Operand types:

REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP.

SREG: DS, ES, SS, and only as second operand: CS.

memory: [BX], [BX+SI+7], variable, etc...(see Memory Access). part 2

immediate: 5, -24, 3Fh, 10001101b, etc...



Notes:

  • When two operands are required for an instruction they are separated by comma. For example:

    REG, memory
  • When there are two operands, both operands must have the same size (except shift and rotate instructions). For example:

    AL, DL
    DX, AX
    m1 DB ?
    AL, m1
    m2 DW ?
    AX, m2


  • Some instructions allow several operand combinations. For example:

    memory, immediate
    REG, immediate

    memory, REG
    REG, SREG


  • Some examples contain macros, so it is advisable to use Shift + F8 hot key to Step Over (to make macro code execute at maximum speed set step delay to zero), otherwise emulator will step through each instruction of a macro. Here is an example that uses PRINTN macro:
     
       #make_COM#
       include 'emu8086.inc'
       ORG 100h
       MOV AL, 1
       MOV BL, 2
       PRINTN 'Hello World!'   ; macro.
       MOV CL, 3
       PRINTN 'Welcome!'       ; macro.
       RET




These marks are used to show the state of the flags:

1 - instruction sets this flag to 1.
0 - instruction sets this flag to 0.
r - flag value depends on result of the instruction.
? - flag value is undefined (maybe 1 or 0).





Some instructions generate exactly the same machine code, so disassembler may have a problem decoding to your original code. This is especially important for Conditional Jump instructions (see "Program Flow Control" in Tutorials for more information).





Instructions in alphabetical order:

Instruction Operands Description  
AAA No operands ASCII Adjust after Addition.
Corrects result in AH and AL after addition when working with BCD values.

It works according to the following Algorithm:

if low nibble of AL > 9 or AF = 1 then:

  • AL = AL + 6
  • AH = AH + 1
  • AF = 1
  • CF = 1
else
  • AF = 0
  • CF = 0
in both cases:
clear the high nibble of AL.


Example:
MOV AX, 15   ; AH = 00, AL = 0Fh
AAA          ; AH = 01, AL = 05
RET
C Z S O P A
r ? ? ? ? r
 
AAD No operands ASCII Adjust before Division.
Prepares two BCD values for division.

Algorithm:


  • AL = (AH * 10) + AL
  • AH = 0

Example:
MOV AX, 0105h   ; AH = 01, AL = 05
AAD             ; AH = 00, AL = 0Fh (15)
RET
C Z S O P A
? r r ? r ?
 
AAM No operands ASCII Adjust after Multiplication.
Corrects the result of multiplication of two BCD values.

Algorithm:


  • AH = AL / 10
  • AL = remainder

Example:
MOV AL, 15   ; AL = 0Fh
AAM          ; AH = 01, AL = 05
RET
C Z S O P A
? r r ? r ?
 
AAS No operands ASCII Adjust after Subtraction.
Corrects result in AH and AL after subtraction when working with BCD values.

Algorithm:

if low nibble of AL > 9 or AF = 1 then:

  • AL = AL - 6
  • AH = AH - 1
  • AF = 1
  • CF = 1
else
  • AF = 0
  • CF = 0
in both cases:
clear the high nibble of AL.


Example:
MOV AX, 02FFh  ; AH = 02, AL = 0FFh
AAS            ; AH = 01, AL = 09
RET
C Z S O P A
r ? ? ? ? r
 
ADC REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Add with Carry.


Algorithm:

operand1 = operand1 + operand2 + CF

Example:
STC        ; set CF = 1
MOV AL, 5  ; AL = 5
ADC AL, 1  ; AL = 7
RET
C Z S O P A
r r r r r r
 
ADD REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Add.


Algorithm:

operand1 = operand1 + operand2

Example:
MOV AL, 5   ; AL = 5
ADD AL, -3  ; AL = 2
RET
C Z S O P A
r r r r r r
 
AND REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Logical AND between all bits of two operands. Result is stored in operand1.

These rules apply:

1 AND 1 = 1
1 AND 0 = 0
0 AND 1 = 0
0 AND 0 = 0


Example:
MOV AL, 'a'        ; AL = 01100001b
AND AL, 11011111b  ; AL = 01000001b  ('A')
RET
C Z S O P
0 r r 0 r
 
CALL procedure name
label
4-byte address
Transfers control to procedure, return address is (IP) is pushed to stack. 4-byte address may be entered in this form: 1234h:5678h, first value is a segment second value is an offset (this is a far call, so CS is also pushed to stack).


Example:
#make_COM#
ORG 100h  ; for COM file.

CALL p1

ADD AX, 1

RET         ; return to OS.

p1 PROC     ; procedure declaration.
    MOV AX, 1234h
    RET     ; return to caller.
p1 ENDP
C Z S O P A
unchanged
 
CBW No operands Convert byte into word.

Algorithm:

if high bit of AL = 1 then:
  • AH = 255 (0FFh)

else

  • AH = 0

Example:
MOV AX, 0   ; AH = 0, AL = 0
MOV AL, -5  ; AX = 000FBh (251)
CBW         ; AX = 0FFFBh (-5)
RET
C Z S O P A
unchanged
 
CLC No operands Clear Carry flag.

Algorithm:

CF = 0

C
0
 
CLD No operands Clear Direction flag. SI and DI will be incremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW.

Algorithm:

DF = 0

D
0
 
CLI No operands Clear Interrupt enable flag. This disables hardware interrupts.

Algorithm:

IF = 0

I
0
 
CMC No operands Complement Carry flag. Inverts value of CF.

Algorithm:

if CF = 1 then CF = 0
if CF = 0 then CF = 1


C
r
 
CMP REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Compare.

Algorithm:

operand1 - operand2

result is not stored anywhere, flags are set (OF, SF, ZF, AF, PF, CF) according to result.


Example:
MOV AL, 5
MOV BL, 5
CMP AL, BL  ; AL = 5, ZF = 1 (so equal!)
RET
C Z S O P A
r r r r r r
 
CMPSB No operands Compare bytes: ES:[DI] from DS:[SI].

Algorithm:


  • DS:[SI] - ES:[DI]
  • set flags according to result:
    OF, SF, ZF, AF, PF, CF
  • if DF = 0 then
    • SI = SI + 1
    • DI = DI + 1
    else
    • SI = SI - 1
    • DI = DI - 1


C Z S O P A
r r r r r r
 
CMPSW No operands Compare words: ES:[DI] from DS:[SI].

Algorithm:


  • DS:[SI] - ES:[DI]
  • set flags according to result:
    OF, SF, ZF, AF, PF, CF
  • if DF = 0 then
    • SI = SI + 2
    • DI = DI + 2
    else
    • SI = SI - 2
    • DI = DI - 2


C Z S O P A
r r r r r r
 
CWD No operands Convert Word to Double word.

Algorithm:

if high bit of AX = 1 then:
  • DX = 65535 (0FFFFh)

else

  • DX = 0

Example:
MOV DX, 0   ; DX = 0
MOV AX, 0   ; AX = 0
MOV AX, -5  ; DX AX = 00000h:0FFFBh
CWD         ; DX AX = 0FFFFh:0FFFBh
RET
C Z S O P A
unchanged
 
DAA No operands Decimal adjust After Addition.
Corrects the result of addition of two packed BCD values.

Algorithm:

if low nibble of AL > 9 or AF = 1 then:

  • AL = AL + 6
  • AF = 1
if AL > 9Fh or CF = 1 then:
  • AL = AL + 60h
  • CF = 1

Example:
MOV AL, 0Fh  ; AL = 0Fh (15)
DAA          ; AL = 15h
RET
C Z S O P A
r r r r r r
 
DAS No operands Decimal adjust After Subtraction.
Corrects the result of subtraction of two packed BCD values.

Algorithm:

if low nibble of AL > 9 or AF = 1 then:

  • AL = AL - 6
  • AF = 1
if AL > 9Fh or CF = 1 then:
  • AL = AL - 60h
  • CF = 1

Example:
MOV AL, 0FFh  ; AL = 0FFh (-1)
DAS           ; AL = 99h, CF = 1
RET
C Z S O P A
r r r r r r
 
DEC REG
memory
Decrement.

Algorithm:

operand = operand - 1


Example:
MOV AL, 255  ; AL = 0FFh (255 or -1)
DEC AL       ; AL = 0FEh (254 or -2)
RET
Z S O P A
r r r r r
CF - unchanged!
 
DIV REG
memory
Unsigned divide.

Algorithm:

when operand is a byte:
AL = AX / operand
AH = remainder (modulus)
when operand is a word:
AX = (DX AX) / operand
DX = remainder (modulus)
Example:
MOV AX, 203   ; AX = 00CBh
MOV BL, 4
DIV BL        ; AL = 50 (32h), AH = 3
RET
C Z S O P A
? ? ? ? ? ?
 
HLT No operands Halt the System.

Example:
MOV AX, 5
HLT
C Z S O P A
unchanged
 
IDIV REG
memory
Signed divide.

Algorithm:

when operand is a byte:
AL = AX / operand
AH = remainder (modulus)
when operand is a word:
AX = (DX AX) / operand
DX = remainder (modulus)
Example:
MOV AX, -203 ; AX = 0FF35h
MOV BL, 4
IDIV BL      ; AL = -50 (0CEh), AH = -3 (0FDh)
RET
C Z S O P A
? ? ? ? ? ?
 
IMUL REG
memory
Signed multiply.

Algorithm:

when operand is a byte:
AX = AL * operand.
when operand is a word:
(DX AX) = AX * operand.
Example:
MOV AL, -2
MOV BL, -4
IMUL BL      ; AX = 8
RET
C Z S O P A
r ? ? r ? ?
CF=OF=0 when result fits into operand of IMUL.
 
IN AL, im.byte
AL, DX
AX, im.byte
AX, DX
Input from port into AL or AX.
Second operand is a port number. If required to access port number over 255 - DX register should be used.
Example:
IN AX, 4  ; get status of traffic lights.
IN AL, 7  ; get status of stepper-motor.
C Z S O P A
unchanged
 
INC REG
memory
Increment.

Algorithm:

operand = operand + 1

Example:
MOV AL, 4
INC AL       ; AL = 5
RET
Z S O P A
r r r r r
CF - unchanged!
 
INT immediate byte Interrupt numbered by immediate byte (0..255).

Algorithm:


    Push to stack:
    • flags register
    • CS
    • IP
  • IF = 0
  • Transfer control to interrupt procedure

Example:
MOV AH, 0Eh  ; teletype.
MOV AL, 'A'
INT 10h      ; BIOS interrupt.
RET
C Z S O P A I
unchanged 0
 
INTO No operands Interrupt 4 if Overflow flag is 1.

Algorithm:

if OF = 1 then INT 4

Example:
; -5 - 127 = -132 (not in -128..127)
; the result of SUB is wrong (124),
; so OF = 1 is set:
MOV AL, -5
SUB AL, 127   ; AL = 7Ch (124)
INTO          ; process error.
RET
 
IRET No operands Interrupt Return.

Algorithm:


    Pop from stack:
    • IP
    • CS
    • flags register
C Z S O P A
popped
 
JA label Short Jump if first operand is Above second operand (as set by CMP instruction). Unsigned.

Algorithm:


    if (CF = 0) and (ZF = 0) then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 250
   CMP AL, 5
   JA label1
   PRINT 'AL is not above 5'
   JMP exit
label1:
   PRINT 'AL is above 5'
exit:
   RET
C Z S O P A
unchanged
 
JAE label Short Jump if first operand is Above or Equal to second operand (as set by CMP instruction). Unsigned.

Algorithm:


    if CF = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 5
   CMP AL, 5
   JAE label1
   PRINT 'AL is not above or equal to 5'
   JMP exit
label1:
   PRINT 'AL is above or equal to 5'
exit:
   RET
C Z S O P A
unchanged
 
JB label Short Jump if first operand is Below second operand (as set by CMP instruction). Unsigned.

Algorithm:


    if CF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 1
   CMP AL, 5
   JB  label1
   PRINT 'AL is not below 5'
   JMP exit
label1:
   PRINT 'AL is below 5'
exit:
   RET
C Z S O P A
unchanged
 
JBE label Short Jump if first operand is Below or Equal to second operand (as set by CMP instruction). Unsigned.

Algorithm:


    if CF = 1 or ZF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 5
   CMP AL, 5
   JBE  label1
   PRINT 'AL is not below or equal to 5'
   JMP exit
label1:
   PRINT 'AL is below or equal to 5'
exit:
   RET
C Z S O P A
unchanged
 
JC label Short Jump if Carry flag is set to 1.

Algorithm:


    if CF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 255
   ADD AL, 1
   JC  label1
   PRINT 'no carry.'
   JMP exit
label1:
   PRINT 'has carry.'
exit:
   RET
C Z S O P A
unchanged
 
JCXZ label Short Jump if CX register is 0.

Algorithm:


    if CX = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV CX, 0
   JCXZ label1
   PRINT 'CX is not zero.'
   JMP exit
label1:
   PRINT 'CX is zero.'
exit:
   RET
C Z S O P A
unchanged
 
JE label Short Jump if first operand is Equal to second operand (as set by CMP instruction). Signed/Unsigned.

Algorithm:


    if ZF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 5
   CMP AL, 5
   JE  label1
   PRINT 'AL is not equal to 5.'
   JMP exit
label1:
   PRINT 'AL is equal to 5.'
exit:
   RET
C Z S O P A
unchanged
 
JG label Short Jump if first operand is Greater then second operand (as set by CMP instruction). Signed.

Algorithm:


    if (ZF = 0) and (SF = OF) then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 5
   CMP AL, -5
   JG  label1
   PRINT 'AL is not greater -5.'
   JMP exit
label1:
   PRINT 'AL is greater -5.'
exit:
   RET
C Z S O P A
unchanged
 
JGE label Short Jump if first operand is Greater or Equal to second operand (as set by CMP instruction). Signed.

Algorithm:


    if SF = OF then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   CMP AL, -5
   JGE  label1
   PRINT 'AL < -5'
   JMP exit
label1:
   PRINT 'AL >= -5'
exit:
   RET
C Z S O P A
unchanged
 
JL label Short Jump if first operand is Less then second operand (as set by CMP instruction). Signed.

Algorithm:


    if SF <> OF then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, -2
   CMP AL, 5
   JL  label1
   PRINT 'AL >= 5.'
   JMP exit
label1:
   PRINT 'AL < 5.'
exit:
   RET
C Z S O P A
unchanged
 
JLE label Short Jump if first operand is Less or Equal to second operand (as set by CMP instruction). Signed.

Algorithm:


    if SF <> OF or ZF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, -2
   CMP AL, 5
   JLE label1
   PRINT 'AL > 5.'
   JMP exit
label1:
   PRINT 'AL <= 5.'
exit:
   RET
C Z S O P A
unchanged
 
JMP label
4-byte address
Unconditional Jump. Transfers control to another part of the program. 4-byte address may be entered in this form: 1234h:5678h, first value is a segment second value is an offset.


Algorithm:


    always jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 5
   JMP label1    ; jump over 2 lines!
   PRINT 'Not Jumped!'
   MOV AL, 0
label1:
   PRINT 'Got Here!'
   RET
C Z S O P A
unchanged
 
JNA label Short Jump if first operand is Not Above second operand (as set by CMP instruction). Unsigned.

Algorithm:


    if CF = 1 or ZF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   CMP AL, 5
   JNA label1
   PRINT 'AL is above 5.'
   JMP exit
label1:
   PRINT 'AL is not above 5.'
exit:
   RET
C Z S O P A
unchanged
 
JNAE label Short Jump if first operand is Not Above and Not Equal to second operand (as set by CMP instruction). Unsigned.

Algorithm:


    if CF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   CMP AL, 5
   JNAE label1
   PRINT 'AL >= 5.'
   JMP exit
label1:
   PRINT 'AL < 5.'
exit:
   RET
C Z S O P A
unchanged
 
JNB label Short Jump if first operand is Not Below second operand (as set by CMP instruction). Unsigned.

Algorithm:


    if CF = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 7
   CMP AL, 5
   JNB label1
   PRINT 'AL < 5.'
   JMP exit
label1:
   PRINT 'AL >= 5.'
exit:
   RET
C Z S O P A
unchanged
 
JNBE label Short Jump if first operand is Not Below and Not Equal to second operand (as set by CMP instruction). Unsigned.

Algorithm:


    if (CF = 0) and (ZF = 0) then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 7
   CMP AL, 5
   JNBE label1
   PRINT 'AL <= 5.'
   JMP exit
label1:
   PRINT 'AL > 5.'
exit:
   RET
C Z S O P A
unchanged
 
JNC label Short Jump if Carry flag is set to 0.

Algorithm:


    if CF = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   ADD AL, 3
   JNC  label1
   PRINT 'has carry.'
   JMP exit
label1:
   PRINT 'no carry.'
exit:
   RET
C Z S O P A
unchanged
 
JNE label Short Jump if first operand is Not Equal to second operand (as set by CMP instruction). Signed/Unsigned.

Algorithm:


    if ZF = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   CMP AL, 3
   JNE  label1
   PRINT 'AL = 3.'
   JMP exit
label1:
   PRINT 'Al <> 3.'
exit:
   RET
C Z S O P A
unchanged
 
JNG label Short Jump if first operand is Not Greater then second operand (as set by CMP instruction). Signed.

Algorithm:


    if (ZF = 1) and (SF <> OF) then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   CMP AL, 3
   JNG  label1
   PRINT 'AL > 3.'
   JMP exit
label1:
   PRINT 'Al <= 3.'
exit:
   RET
C Z S O P A
unchanged
 
JNGE label Short Jump if first operand is Not Greater and Not Equal to second operand (as set by CMP instruction). Signed.

Algorithm:


    if SF <> OF then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   CMP AL, 3
   JNGE  label1
   PRINT 'AL >= 3.'
   JMP exit
label1:
   PRINT 'Al < 3.'
exit:
   RET
C Z S O P A
unchanged
 
JNL label Short Jump if first operand is Not Less then second operand (as set by CMP instruction). Signed.

Algorithm:


    if SF = OF then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   CMP AL, -3
   JNL label1
   PRINT 'AL < -3.'
   JMP exit
label1:
   PRINT 'Al >= -3.'
exit:
   RET
C Z S O P A
unchanged
 
JNLE label Short Jump if first operand is Not Less and Not Equal to second operand (as set by CMP instruction). Signed.

Algorithm:


    if (SF = OF) and (ZF = 0) then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 2
   CMP AL, -3
   JNLE label1
   PRINT 'AL <= -3.'
   JMP exit
label1:
   PRINT 'Al > -3.'
exit:
   RET
C Z S O P A
unchanged
 
JNO label Short Jump if Not Overflow.

Algorithm:


    if OF = 0 then jump
Example:
; -5 - 2 = -7 (inside -128..127)
; the result of SUB is correct,
; so OF = 0:

include 'emu8086.inc'
#make_COM#
ORG 100h
  MOV AL, -5
  SUB AL, 2   ; AL = 0F9h (-7)
JNO  label1
  PRINT 'overflow!'
JMP exit
label1:
  PRINT 'no overflow.'
exit:
  RET
C Z S O P A
unchanged
 
JNP label Short Jump if No Parity (odd). Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.

Algorithm:


    if PF = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 00000111b   ; AL = 7
   OR  AL, 0           ; just set flags.
   JNP label1
   PRINT 'parity even.'
   JMP exit
label1:
   PRINT 'parity odd.'
exit:
   RET
C Z S O P A
unchanged
 
JNS label Short Jump if Not Signed (if positive). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.

Algorithm:


    if SF = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 00000111b   ; AL = 7
   OR  AL, 0           ; just set flags.
   JNS label1
   PRINT 'signed.'
   JMP exit
label1:
   PRINT 'not signed.'
exit:
   RET
C Z S O P A
unchanged
 
JNZ label Short Jump if Not Zero (not equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.

Algorithm:


    if ZF = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 00000111b   ; AL = 7
   OR  AL, 0           ; just set flags.
   JNZ label1
   PRINT 'zero.'
   JMP exit
label1:
   PRINT 'not zero.'
exit:
   RET
C Z S O P A
unchanged
 
JO label Short Jump if Overflow.

Algorithm:


    if OF = 1 then jump
Example:
; -5 - 127 = -132 (not in -128..127)
; the result of SUB is wrong (124),
; so OF = 1 is set:

include 'emu8086.inc'
#make_COM#
org 100h
  MOV AL, -5
  SUB AL, 127   ; AL = 7Ch (124)
JO  label1
  PRINT 'no overflow.'
JMP exit
label1:
  PRINT 'overflow!'
exit:
  RET
C Z S O P A
unchanged
 
JP label Short Jump if Parity (even). Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.

Algorithm:


    if PF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 00000101b   ; AL = 5
   OR  AL, 0           ; just set flags.
   JP label1
   PRINT 'parity odd.'
   JMP exit
label1:
   PRINT 'parity even.'
exit:
   RET
C Z S O P A
unchanged
 
JPE label Short Jump if Parity Even. Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.

Algorithm:


    if PF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 00000101b   ; AL = 5
   OR  AL, 0           ; just set flags.
   JPE label1
   PRINT 'parity odd.'
   JMP exit
label1:
   PRINT 'parity even.'
exit:
   RET
C Z S O P A
unchanged
 
JPO label Short Jump if Parity Odd. Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.

Algorithm:


    if PF = 0 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 00000111b   ; AL = 7
   OR  AL, 0           ; just set flags.
   JPO label1
   PRINT 'parity even.'
   JMP exit
label1:
   PRINT 'parity odd.'
exit:
   RET
C Z S O P A
unchanged
 
JS label Short Jump if Signed (if negative). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.

Algorithm:


    if SF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 10000000b   ; AL = -128
   OR  AL, 0           ; just set flags.
   JS label1
   PRINT 'not signed.'
   JMP exit
label1:
   PRINT 'signed.'
exit:
   RET
C Z S O P A
unchanged
 
JZ label Short Jump if Zero (equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions.

Algorithm:


    if ZF = 1 then jump
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AL, 5
   CMP AL, 5
   JZ  label1
   PRINT 'AL is not equal to 5.'
   JMP exit
label1:
   PRINT 'AL is equal to 5.'
exit:
   RET
C Z S O P A
unchanged
 
LAHF No operands Load AH from 8 low bits of Flags register.

Algorithm:


    AH = flags register


AH bit:   7    6   5    4   3    2   1    0
        [SF] [ZF] [0] [AF] [0] [PF] [1] [CF]
bits 1, 3, 5 are reserved.

C Z S O P A
unchanged
 
LDS REG, memory Load memory double word into word register and DS.

Algorithm:


  • REG = first word
  • DS = second word

Example:

#make_COM#
ORG 100h

LDS AX, m

RET

m  DW  1234h
   DW  5678h

END

AX is set to 1234h, DS is set to 5678h.

C Z S O P A
unchanged
 
LEA REG, memory Load Effective Address.

Algorithm:


  • REG = address of memory (offset)

Generally this instruction is replaced by MOV when assembling when possible.

Example:

#make_COM#
ORG 100h

LEA AX, m

RET

m  DW  1234h

END

AX is set to: 0104h.
LEA instruction takes 3 bytes, RET takes 1 byte, we start at 100h, so the address of 'm' is 104h.

C Z S O P A
unchanged
 
LES REG, memory Load memory double word into word register and ES.

Algorithm:


  • REG = first word
  • ES = second word

Example:

#make_COM#
ORG 100h

LES AX, m

RET

m  DW  1234h
   DW  5678h

END

AX is set to 1234h, ES is set to 5678h.

C Z S O P A
unchanged
 
LODSB No operands Load byte at DS:[SI] into AL. Update SI.

Algorithm:


  • AL = DS:[SI]
  • if DF = 0 then
    • SI = SI + 1
    else
    • SI = SI - 1
Example:
#make_COM#
ORG 100h

LEA SI, a1
MOV CX, 5
MOV AH, 0Eh

m: LODSB
INT 10h
LOOP m

RET

a1 DB 'H', 'e', 'l', 'l', 'o'
C Z S O P A
unchanged
 
LODSW No operands Load word at DS:[SI] into AX. Update SI.

Algorithm:


  • AX = DS:[SI]
  • if DF = 0 then
    • SI = SI + 2
    else
    • SI = SI - 2
Example:
#make_COM#
ORG 100h

LEA SI, a1
MOV CX, 5

REP LODSW   ; finally there will be 555h in AX.

RET

a1 dw 111h, 222h, 333h, 444h, 555h
C Z S O P A
unchanged
 
LOOP label Decrease CX, jump to label if CX not zero.

Algorithm:


  • CX = CX - 1
  • if CX <> 0 then
    • jump
    else
    • no jump, continue
Example:
   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV CX, 5
label1:
   PRINTN 'loop!'
   LOOP label1
   RET
C Z S O P A
unchanged
 
LOOPE label Decrease CX, jump to label if CX not zero and Equal (ZF = 1).

Algorithm:


  • CX = CX - 1
  • if (CX <> 0) and (ZF = 1) then
    • jump
    else
    • no jump, continue
Example:
; Loop until result fits into AL alone,
; or 5 times. The result will be over 255
; on third loop (100+100+100),
; so loop will exit.

   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AX, 0
   MOV CX, 5
label1:
   PUTC '*'
   ADD AX, 100
   CMP AH, 0
   LOOPE label1
   RET
C Z S O P A
unchanged
 
LOOPNE label Decrease CX, jump to label if CX not zero and Not Equal (ZF = 0).

Algorithm:


  • CX = CX - 1
  • if (CX <> 0) and (ZF = 0) then
    • jump
    else
    • no jump, continue
Example:
; Loop until '7' is found,
; or 5 times.

   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV SI, 0
   MOV CX, 5
label1:
   PUTC '*'
   MOV AL, v1[SI]
   INC SI         ; next byte (SI=SI+1).
   CMP AL, 7
   LOOPNE label1
   RET
   v1 db 9, 8, 7, 6, 5
C Z S O P A
unchanged
 
LOOPNZ label Decrease CX, jump to label if CX not zero and ZF = 0.

Algorithm:


  • CX = CX - 1
  • if (CX <> 0) and (ZF = 0) then
    • jump
    else
    • no jump, continue
Example:
; Loop until '7' is found,
; or 5 times.

   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV SI, 0
   MOV CX, 5
label1:
   PUTC '*'
   MOV AL, v1[SI]
   INC SI         ; next byte (SI=SI+1).
   CMP AL, 7
   LOOPNZ label1
   RET
   v1 db 9, 8, 7, 6, 5
C Z S O P A
unchanged
 
LOOPZ label Decrease CX, jump to label if CX not zero and ZF = 1.

Algorithm:


  • CX = CX - 1
  • if (CX <> 0) and (ZF = 1) then
    • jump
    else
    • no jump, continue
Example:
; Loop until result fits into AL alone,
; or 5 times. The result will be over 255
; on third loop (100+100+100),
; so loop will exit.

   include 'emu8086.inc'
   #make_COM#
   ORG 100h
   MOV AX, 0
   MOV CX, 5
label1:
   PUTC '*'
   ADD AX, 100
   CMP AH, 0
   LOOPZ label1
   RET
C Z S O P A
unchanged
 
MOV REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate

SREG, memory
memory, SREG
REG, SREG
SREG, REG
Copy operand2 to operand1.

The MOV instruction cannot:
  • set the value of the CS and IP registers.
  • copy value of one segment register to another segment register (should copy to general register first).
  • copy immediate value to segment register (should copy to general register first).

Algorithm:


operand1 = operand2
Example:
#make_COM#
ORG 100h
MOV AX, 0B800h    ; set AX = B800h (VGA memory).
MOV DS, AX        ; copy value of AX to DS.
MOV CL, 'A'       ; CL = 41h (ASCII code).
MOV CH, 01011111b ; CL = color attribute.
MOV BX, 15Eh      ; BX = position on screen.
MOV [BX], CX      ; w.[0B800h:015Eh] = CX.
RET               ; returns to operating system.
C Z S O P A
unchanged
 
MOVSB No operands Copy byte at DS:[SI] to ES:[DI]. Update SI and DI.

Algorithm:


  • ES:[DI] = DS:[SI]
  • if DF = 0 then
    • SI = SI + 1
    • DI = DI + 1
    else
    • SI = SI - 1
    • DI = DI - 1
Example:
#make_COM#
ORG 100h

LEA SI, a1
LEA DI, a2
MOV CX, 5
REP MOVSB

RET

a1 DB 1,2,3,4,5
a2 DB 5 DUP(0)
C Z S O P A
unchanged
 
MOVSW No operands Copy word at DS:[SI] to ES:[DI]. Update SI and DI.

Algorithm:


  • ES:[DI] = DS:[SI]
  • if DF = 0 then
    • SI = SI + 2
    • DI = DI + 2
    else
    • SI = SI - 2
    • DI = DI - 2
Example:
#make_COM#
ORG 100h

LEA SI, a1
LEA DI, a2
MOV CX, 5
REP MOVSW

RET

a1 DW 1,2,3,4,5
a2 DW 5 DUP(0)
C Z S O P A
unchanged
 
MUL REG
memory
Unsigned multiply.

Algorithm:

when operand is a byte:
AX = AL * operand.
when operand is a word:
(DX AX) = AX * operand.
Example:
MOV AL, 200   ; AL = 0C8h
MOV BL, 4
MUL BL        ; AX = 0320h (800)
RET
C Z S O P A
r ? ? r ? ?
CF=OF=0 when high section of the result is zero.
 
NEG REG
memory
Negate. Makes operand negative (two's complement).

Algorithm:


  • Invert all bits of the operand
  • Add 1 to inverted operand
Example:
MOV AL, 5   ; AL = 05h
NEG AL      ; AL = 0FBh (-5)
NEG AL      ; AL = 05h (5)
RET
C Z S O P A
r r r r r r
 
NOP No operands No Operation.

Algorithm:


  • Do nothing
Example:
; do nothing, 3 times:
NOP
NOP
NOP
RET
C Z S O P A
unchanged
 
NOT REG
memory
Invert each bit of the operand.

Algorithm:


  • if bit is 1 turn it to 0.
  • if bit is 0 turn it to 1.
Example:
MOV AL, 00011011b
NOT AL   ; AL = 11100100b
RET
C Z S O P A
unchanged
 
OR REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Logical OR between all bits of two operands. Result is stored in first operand.

These rules apply:

1 OR 1 = 1
1 OR 0 = 1
0 OR 1 = 1
0 OR 0 = 0


Example:
MOV AL, 'A'       ; AL = 01000001b
OR AL, 00100000b  ; AL = 01100001b  ('a')
RET
C Z S O P A
0 r r 0 r ?
 
OUT im.byte, AL
im.byte, AX
DX, AL
DX, AX
Output from AL or AX to port.
First operand is a port number. If required to access port number over 255 - DX register should be used.

Example:
MOV AX, 0FFFh ; Turn on all
OUT 4, AX     ; traffic lights.

MOV AL, 100b  ; Turn on the third
OUT 7, AL     ; magnet of the stepper-motor.
C Z S O P A
unchanged
 
POP REG
SREG
memory
Get 16 bit value from the stack.

Algorithm:


  • operand = SS:[SP] (top of the stack)
  • SP = SP + 2

Example:
MOV AX, 1234h
PUSH AX
POP  DX     ; DX = 1234h
RET
C Z S O P A
unchanged
 
POPA No operands Pop all general purpose registers DI, SI, BP, SP, BX, DX, CX, AX from the stack.
SP value is ignored, it is Popped but not set to SP register).

Note: this instruction works only on 80186 CPU and later!

Algorithm:


  • POP DI
  • POP SI
  • POP BP
  • POP xx (SP value ignored)
  • POP BX
  • POP DX
  • POP CX
  • POP AX
C Z S O P A
unchanged
 
POPF No operands Get flags register from the stack.

Algorithm:


  • flags = SS:[SP] (top of the stack)
  • SP = SP + 2
C Z S O P A
popped
 
PUSH REG
SREG
memory
immediate
Store 16 bit value in the stack.

Note: PUSH immediate works only on 80186 CPU and later!

Algorithm:


  • SP = SP - 2
  • SS:[SP] (top of the stack) = operand

Example:
MOV AX, 1234h
PUSH AX
POP  DX     ; DX = 1234h
RET
C Z S O P A
unchanged
 
PUSHA No operands Push all general purpose registers AX, CX, DX, BX, SP, BP, SI, DI in the stack.
Original value of SP register (before PUSHA) is used.

Note: this instruction works only on 80186 CPU and later!

Algorithm:


  • PUSH AX
  • PUSH CX
  • PUSH DX
  • PUSH BX
  • PUSH SP
  • PUSH BP
  • PUSH SI
  • PUSH DI
C Z S O P A
unchanged
 
PUSHF No operands Store flags register in the stack.

Algorithm:


  • SP = SP - 2
  • SS:[SP] (top of the stack) = flags
C Z S O P A
unchanged
 
RCL memory, immediate
REG, immediate

memory, CL
REG, CL
Rotate operand1 left through Carry Flag. The number of rotates is set by operand2.
When immediate is greater then 1, assembler generates several RCL xx, 1 instructions because 8086 has machine code only for this instruction (the same principle works for all other shift/rotate instructions).

Algorithm:


    shift all bits left, the bit that goes off is set to CF and previous value of CF is inserted to the right-most position.

Example:
STC               ; set carry (CF=1).
MOV AL, 1Ch       ; AL = 00011100b
RCL AL, 1         ; AL = 00111001b,  CF=0.
RET
C O
r r
OF=0 if first operand keeps original sign.
 
RCR memory, immediate
REG, immediate

memory, CL
REG, CL
Rotate operand1 right through Carry Flag. The number of rotates is set by operand2.

Algorithm:


    shift all bits right, the bit that goes off is set to CF and previous value of CF is inserted to the left-most position.

Example:
STC               ; set carry (CF=1).
MOV AL, 1Ch       ; AL = 00011100b
RCR AL, 1         ; AL = 10001110b,  CF=0.
RET
C O
r r
OF=0 if first operand keeps original sign.
 
REP chain instruction
Repeat following MOVSB, MOVSW, LODSB, LODSW, STOSB, STOSW instructions CX times.

Algorithm:

check_cx:

if CX <> 0 then

  • do following chain instruction
  • CX = CX - 1
  • go back to check_cx
else
  • exit from REP cycle
Z
r
 
REPE chain instruction
Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 1 (result is Equal), maximum CX times.

Algorithm:

check_cx:

if CX <> 0 then

  • do following chain instruction
  • CX = CX - 1
  • if ZF = 1 then:
    • go back to check_cx
    else
    • exit from REPE cycle
else
  • exit from REPE cycle

Z
r
 
REPNE chain instruction
Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 0 (result is Not Equal), maximum CX times.

Algorithm:

check_cx:

if CX <> 0 then

  • do following chain instruction
  • CX = CX - 1
  • if ZF = 0 then:
    • go back to check_cx
    else
    • exit from REPNE cycle
else
  • exit from REPNE cycle
Z
r
 
REPNZ chain instruction
Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 0 (result is Not Zero), maximum CX times.

Algorithm:

check_cx:

if CX <> 0 then

  • do following chain instruction
  • CX = CX - 1
  • if ZF = 0 then:
    • go back to check_cx
    else
    • exit from REPNZ cycle
else
  • exit from REPNZ cycle
Z
r
 
REPZ chain instruction
Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 1 (result is Zero), maximum CX times.

Algorithm:

check_cx:

if CX <> 0 then

  • do following chain instruction
  • CX = CX - 1
  • if ZF = 1 then:
    • go back to check_cx
    else
    • exit from REPZ cycle
else
  • exit from REPZ cycle
Z
r
 
RET No operands
or even immediate
Return from near procedure.

Algorithm:


  • Pop from stack:
    • IP
  • if immediate operand is present: SP = SP + operand
Example:
#make_COM#
ORG 100h  ; for COM file.

CALL p1

ADD AX, 1

RET         ; return to OS.

p1 PROC     ; procedure declaration.
    MOV AX, 1234h
    RET     ; return to caller.
p1 ENDP
C Z S O P A
unchanged
 
RETF No operands
or even immediate
Return from Far procedure.

Algorithm:


  • Pop from stack:
    • IP
    • CS
  • if immediate operand is present: SP = SP + operand
C Z S O P A
unchanged
 
ROL memory, immediate
REG, immediate

memory, CL
REG, CL
Rotate operand1 left. The number of rotates is set by operand2.

Algorithm:


    shift all bits left, the bit that goes off is set to CF and the same bit is inserted to the right-most position.
Example:
MOV AL, 1Ch       ; AL = 00011100b
ROL AL, 1         ; AL = 00111000b,  CF=0.
RET
C O
r r
OF=0 if first operand keeps original sign.
 
ROR memory, immediate
REG, immediate

memory, CL
REG, CL
Rotate operand1 right. The number of rotates is set by operand2.

Algorithm:


    shift all bits right, the bit that goes off is set to CF and the same bit is inserted to the left-most position.
Example:
MOV AL, 1Ch       ; AL = 00011100b
ROR AL, 1         ; AL = 00001110b,  CF=0.
RET
C O
r r
OF=0 if first operand keeps original sign.
 
SAHF No operands Store AH register into low 8 bits of Flags register.

Algorithm:


    flags register = AH


AH bit:   7    6   5    4   3    2   1    0
        [SF] [ZF] [0] [AF] [0] [PF] [1] [CF]
bits 1, 3, 5 are reserved.

C Z S O P A
r r r r r r
 
SAL memory, immediate
REG, immediate

memory, CL
REG, CL
Shift Arithmetic operand1 Left. The number of shifts is set by operand2.

Algorithm:


  • Shift all bits left, the bit that goes off is set to CF.
  • Zero bit is inserted to the right-most position.
Example:
MOV AL, 0E0h      ; AL = 11100000b
SAL AL, 1         ; AL = 11000000b,  CF=1.
RET
C O
r r
OF=0 if first operand keeps original sign.
 
SAR memory, immediate
REG, immediate

memory, CL
REG, CL
Shift Arithmetic operand1 Right. The number of shifts is set by operand2.

Algorithm:


  • Shift all bits right, the bit that goes off is set to CF.
  • The sign bit that is inserted to the left-most position has the same value as before shift.
Example:
MOV AL, 0E0h      ; AL = 11100000b
SAR AL, 1         ; AL = 11110000b,  CF=0.

MOV BL, 4Ch       ; BL = 01001100b
SAR BL, 1         ; BL = 00100110b,  CF=0.

RET
C O
r r
OF=0 if first operand keeps original sign.
 
SBB REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Subtract with Borrow.

Algorithm:

operand1 = operand1 - operand2 - CF

Example:
STC
MOV AL, 5
SBB AL, 3    ; AL = 5 - 3 - 1 = 1

RET
C Z S O P A
r r r r r r
 
SCASB No operands Compare bytes: AL from ES:[DI].

Algorithm:


  • ES:[DI] - AL
  • set flags according to result:
    OF, SF, ZF, AF, PF, CF
  • if DF = 0 then
    • DI = DI + 1
    else
    • DI = DI - 1
C Z S O P A
r r r r r r
 
SCASW No operands Compare words: AX from ES:[DI].

Algorithm:


  • ES:[DI] - AX
  • set flags according to result:
    OF, SF, ZF, AF, PF, CF
  • if DF = 0 then
    • DI = DI + 2
    else
    • DI = DI - 2
C Z S O P A
r r r r r r
 
SHL memory, immediate
REG, immediate

memory, CL
REG, CL
Shift operand1 Left. The number of shifts is set by operand2.

Algorithm:


  • Shift all bits left, the bit that goes off is set to CF.
  • Zero bit is inserted to the right-most position.
Example:
MOV AL, 11100000b
SHL AL, 1         ; AL = 11000000b,  CF=1.

RET
C O
r r
OF=0 if first operand keeps original sign.
 
SHR memory, immediate
REG, immediate

memory, CL
REG, CL
Shift operand1 Right. The number of shifts is set by operand2.

Algorithm:


  • Shift all bits right, the bit that goes off is set to CF.
  • Zero bit is inserted to the left-most position.
Example:
MOV AL, 00000111b
SHR AL, 1         ; AL = 00000011b,  CF=1.

RET
C O
r r
OF=0 if first operand keeps original sign.
 
STC No operands Set Carry flag.

Algorithm:

CF = 1

C
1
 
STD No operands Set Direction flag. SI and DI will be decremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW.

Algorithm:

DF = 1

D
1
 
STI No operands Set Interrupt enable flag. This enables hardware interrupts.

Algorithm:

IF = 1

I
1
 
STOSB No operands Store byte in AL into ES:[DI]. Update SI.

Algorithm:


  • ES:[DI] = AL
  • if DF = 0 then
    • DI = DI + 1
    else
    • DI = DI - 1
Example:
#make_COM#
ORG 100h

LEA DI, a1
MOV AL, 12h
MOV CX, 5

REP STOSB

RET

a1 DB 5 dup(0)
C Z S O P A
unchanged
 
STOSW No operands Store word in AX into ES:[DI]. Update SI.

Algorithm:


  • ES:[DI] = AX
  • if DF = 0 then
    • DI = DI + 2
    else
    • DI = DI - 2
Example:
#make_COM#
ORG 100h

LEA DI, a1
MOV AX, 1234h
MOV CX, 5

REP STOSW

RET

a1 DW 5 dup(0)
C Z S O P A
unchanged
 
SUB REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Subtract.

Algorithm:

operand1 = operand1 - operand2

Example:
MOV AL, 5
SUB AL, 1         ; AL = 4

RET
C Z S O P A
r r r r r r
 
TEST REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Logical AND between all bits of two operands for flags only. These flags are effected: ZF, SF, PF. Result is not stored anywhere.

These rules apply:

1 AND 1 = 1
1 AND 0 = 0
0 AND 1 = 0
0 AND 0 = 0


Example:
MOV AL, 00000101b
TEST AL, 1         ; ZF = 0.
TEST AL, 10b       ; ZF = 1.
RET
C Z S O P
0 r r 0 r
 
XCHG REG, memory
memory, REG
REG, REG
Exchange values of two operands.

Algorithm:

operand1 < - > operand2

Example:
MOV AL, 5
MOV AH, 2
XCHG AL, AH   ; AL = 2, AH = 5
XCHG AL, AH   ; AL = 5, AH = 2
RET
C Z S O P A
unchanged
 
XLATB No operands Translate byte from table.
Copy value of memory byte at DS:[BX + unsigned AL] to AL register.

Algorithm:

AL = DS:[BX + unsigned AL]

Example:
#make_COM#
ORG 100h
LEA BX, dat
MOV AL, 2
XLATB     ; AL = 33h

RET

dat DB 11h, 22h, 33h, 44h, 55h
C Z S O P A
unchanged
 
XOR REG, memory
memory, REG
REG, REG
memory, immediate
REG, immediate
Logical XOR (Exclusive OR) between all bits of two operands. Result is stored in first operand.

These rules apply:

1 XOR 1 = 0
1 XOR 0 = 1
0 XOR 1 = 1
0 XOR 0 = 0


Example:
MOV AL, 00000111b
XOR AL, 00000010b    ; AL = 00000101b
RET
C Z S O P A
0 r r 0 r ?









  emu8086 is better than NASM, MASM or TASM

Tag: 8086 Assembler, 8086 microprocessors instruction, assembly code, Assembly coding, assembly guide, assembly instruction, assembly language, assembly language instruction set, assembly language programming, Assembly program, assembly programming, capital letter, character convert, complete 8086 instruction sets microprocessors, complete instruction timing and instruction sets for 8086 microprocessors, conversion of characters in assembly language programming 8086, convert, emu8086, instruction complete set, instruction set complete for 8086, instruction sets, instruction sets for 8086, Lower case, Lowercase, print the small character into capital letter, programming 8086 assembly language conversion of small characters to capital, small letter, text string convert, Tutorial,

Assembly Language : 8086 Assembler Tutorial Part 12

Assembly Language : 8086 Assembler Tutorial Part 11

Assembly Language : 8086 Assembler Tutorial Part 10

Assembly Language : 8086 Assembler Tutorial Part 9

Assembly Language : 8086 Assembler Tutorial Part 8

Assembly Language : 8086 Assembler Tutorial Part 7

Assembly Language : 8086 Assembler Tutorial Part 6

Assembly Language : 8086 Assembler Tutorial Part 5

Assembly Language : 8086 Assembler Tutorial Part 4

Assembly Language : 8086 Assembler Tutorial Part 3

Assembly Language : 8086 Assembler Tutorial Part 2

Assembly Language : 8086 Assembler Tutorial Part 1

Assembly Language Programming : Complete 8086 instruction sets

Assembly Language Programming : I/O ports - IN/OUT instructions 

Assembly Language programming : Emu8086 Assembler Compiling and MASM / TASM compatibility

Assembly Language - string convert - Lowercase , Uppercase

for programming : the language of Number

Assembly Language - Complete Instruction Set and Instruction Timing of 8086 microprocessors

Assembly Language programming : A list of emulator supported interrupts

Assembly Language Programming : Emu8086 Overview, Using Emulator, Virtual Drives

Assembly Language Programming : All about Memory - Global Memory Table and Custom Memory Map

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